1. Field of the Invention
The present invention relates to a solid-state imaging device, a signal processing method for the same, and an imaging apparatus.
2. Description of the Related Art
FIG. 36 shows an example of a configuration of a unit pixel 100 of a solid-state imaging device. As with this example, in the unit pixel 100 having a transfer transistor for transferring signal charges obtained through photoelectric conversion in a photoelectric conversion element 101, a maximum quantity, Qfd.max, of charges accumulated which can be transferred to a floating diffusion capacitor (FD) 106 of the unit pixel is made sufficiently larger than a maximum quantity, Qpd.max, of charges accumulated in the photoelectric conversion element 101 as a light receiving unit. As a result, the perfect transfer of the signal charges from the photoelectric conversion element 101 to the floating diffusion capacitor 106 is realized by removing the residual charges in the photoelectric conversion element 101.
The perfect transfer is realized for the signal charges obtained through the photoelectric conversion in the photoelectric conversion element 101 in the manner as described above, which results in that a residual image in a phase of photographing of an image can be prevented and a satisfactory linearity between a luminance of an incident light and a sensor output signal can be realized. In this connection, the unit pixel 100 of this embodiment includes a reset transistor 103, an amplification transistor 104 and a pixel selecting transistor 105 in addition to the transfer transistor 102.
However, the unit pixel 100 shown in FIG. 36 involves the following problems.
(1) Since the maximum quantity, Qfd.max, of charges accumulated must be larger than the maximum quantity, Qpd.max, of charges accumulated in the photoelectric conversion element 101, there is a limit to reduction of the capacitance of the floating diffusion capacitor 106 for enhancement of a charge-to-voltage conversion efficiency.
(2) Since for the same reason as that of the above, a decrease in power source voltage Vdd used as a reset voltage for the floating diffusion capacitor 106 leads to reduction of the maximum quantity, Qfd.max, of charges accumulated in the floating diffusion capacitor 106, there is a limit to lowering of the power source voltage Vdd.
Then, heretofore, the problems (1) and (2) described above are solved in the following manner. That is to say, when the maximum quantity, Qfd.max, of charges accumulated is less due to the reduction of the capacitance of the floating diffusion capacitor 106 for enhancement of a charge-to-voltage conversion efficiency, or when the maximum quantity, Qfd.max, of charges accumulated is less owing to the lowering of the reset voltage (power source voltage) Vdd, after the charge transfer, the signal reading, and the reset of the floating diffusion capacitor 106 are carried out, the charges which remain in the photoelectric conversion element 101 because they are more than the transfer transistor 102 can transfer are transferred again to read out the signal. As a result, all the charges accumulated in the photoelectric conversion element 101 are read out in plural batches. This technique, for example, is described in the Japanese Patent Laid-Open No. 2001-177775.